Product Summary

The CY2308SXI-2T is a 3.3V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The CY2308SXI-2T has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven into the FBK pin and obtained from one of the outputs. The input-to-output skew is less than 350 ps and output-to-output skew is less than 200 ps.

Parametrics

CY2308SXI-2T absolute maximum ratings: (1)Supply Voltage to Ground Potential: –0.5V to +7.0V; (2)DC Input Voltage (Except Ref): –0.5V to VDD + 0.5V; (3)DC Input Voltage REF : –0.5 to 7V; (4)Storage Temperature: –65℃ to +150℃; (5)Junction Temperature: 150℃.

Features

CY2308SXI-2T features: (1)Zero input-output propagation delay, adjustable by capacitive load on FBK input; (2)Multiple configurations; (3)Multiple low skew outputs; (4)Two banks of four outputs, three-stateable by two select inputs; (5)10 MHz to 133 MHz operating range; (6)75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz); (7)Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP; (8)3.3V operation; (9)Industrial Temperature available.

Diagrams

CY2308SXI-2T pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
CY2308SXI-2T
CY2308SXI-2T

Cypress Semiconductor

Phase Locked Loops (PLL) 3.3VZDB IND

Data Sheet

0-1855: $3.44
1855-2000: $3.31
2000-2500: $3.31
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
CY2300
CY2300

Other


Data Sheet

Negotiable 
CY2300SXC
CY2300SXC

Cypress Semiconductor

Phase Locked Loops (PLL) 3.3VZDB COM

Data Sheet

0-1: $4.99
1-25: $4.31
25-100: $4.08
100-250: $3.40
CY2300SXCT
CY2300SXCT

Cypress Semiconductor

Phase Locked Loops (PLL) 3.3VZDB COM

Data Sheet

0-1853: $3.10
1853-2000: $2.99
2000-2500: $2.99
CY2302
CY2302

Other


Data Sheet

Negotiable 
CY23020-1
CY23020-1

Other


Data Sheet

Negotiable 
CY23020LFI-3
CY23020LFI-3

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Data Sheet

Negotiable